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Features: EX-LIBRARY
Book Title: Introduction to Logic Synthesis using Verilog HDL Paperback
Number of Pages: 84 Pages
Language: English
Publication Name: Introduction to Logic Synthesis Using Verilog Hdl
Publisher: Morgan & Claypool Publishers
Publication Year: 2006
Subject: Electronics / Circuits / Logic, General, Logic Design
Type: Textbook
Author: Robert B. Reese, Mitchell A. Thornton
Item Length: 9.3 in
Subject Area: Computers, Technology & Engineering
Series: Synthesis Lectures on Digital Circuits and Systems Ser.
Item Width: 7.4 in
Format: Trade Paperback
